BY: Alberto Blanco (alberto_bc) DATE: 2016-09-30 18:05 No attachment found SUBJECT: Trigger system Hi, This is a thread to discuss some issues for the potential new trigger system for TRAGALDABAS. Well this trigger system already exist and is working in other setup.
The idea is to replace all the NIM stuff related to trigger that is currently installed, and to improve the versatility of the trigger system.
How does it work in TRAGALDABAS (note that the design has been implemented to be used in all the RPCs setups we have so far, therefore there are some blocks that are not use here but on other places).
This is the block diagram of the trigger system (http://forge.cesga.es/docman/view.php/72/1493/FPGA-trigger).
- There are 16 inputs (right now, 4 more are foreseen as spare, to be used later).
- Each group of four belong to a RPC plane, four MBs. Each of these inputs can be monitored (counts) or enable/disable.
- Then, the Level1_gate and the Level2_gate (which are configurable ports) are set to OR. In this way in the Level2_en lines, we will have the sum of signal from each sector. The majority unit is set to the desired value.
In this implementation the boards, that sum the signals from the MBs, are redundant. But if a multiplicity trigger is to be implemented, one can use this board and connect the output directly to one input of the new trigger board (and disable the other three). Each group of four inputs (on the trigger board) has a configurable threshold => multiplicity trigger.
The system has also all the necessary tools to operate TRAGALDABAS: a stretcher, a periodical signal to synchronize the boards and the inhibit signal.
The trigger board is controlled by a linux machine. All the functionalities are remotely controllable.
So, something missed? |