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You can contact us at:\\ |
You can contact us at:\\ |
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Dr Guillermo Lopez Taboada |
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Computer Architecture Group (CAG) |
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University of A Coruña, Spain |
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taboada@udc.es\\ |
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Galicia Supercomputing Center (CESGA) |
Galicia Supercomputing Center (CESGA) |
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\url{http://www.cesga.es} |
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Santiago de Compostela, Spain |
Santiago de Compostela, Spain |
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upc@cesga.es |
upc@cesga.es\\\\ |
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PhD. Guillermo Lopez Taboada |
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Computer Architecture Group (CAG) |
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\url{http://gac.des.udc.es/index_en.html} |
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University of A Coruña, Spain |
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taboada@udc.es\\ |
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\section{Acknowledgments} |
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This work was funded by Hewlett-Packard Spain and partially supported by the Ministry of Science and Innovation of Spain under Project TIN2007-67537-C03-02 and by the Galician Government (Xunta de Galicia, Spain) under the Consolidation Program of Competitive Research Groups (Ref. 3/2006 DOGA 12/13/2006). We gratefully thank Brian Wibecan for his comments and for share with us his thoughts and knowledge. Also, we thank Jim Bovay for his support, and CESGA, for providing access to the FinisTerrae supercomputer. |
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\section{Files in this benchmarking suite} |
\section{Files in this benchmarking suite} |
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\item \texttt{upc\_memput} (local) |
\item \texttt{upc\_memput} (local) |
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\item \texttt{memcpy} (local) |
\item \texttt{memcpy} (local) |
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\item \texttt{memmove} (local) |
\item \texttt{memmove} (local) |
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\item \texttt{upc\_memcpy\_async} (remote) |
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\item \texttt{upc\_memget\_async} (remote) |
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\item \texttt{upc\_memput\_async} (remote) |
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\item \texttt{upc\_memcpy\_async} (local) |
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\item \texttt{upc\_memget\_async} (local) |
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\item \texttt{upc\_memput\_async} (local) |
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\item \texttt{upc\_memcpy\_asynci} (remote) |
\item \texttt{upc\_memcpy\_asynci} (remote) |
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\item \texttt{upc\_memget\_asynci} (remote) |
\item \texttt{upc\_memget\_asynci} (remote) |
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\item \texttt{upc\_memput\_asynci} (remote) |
\item \texttt{upc\_memput\_asynci} (remote) |
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\begin{itemize} |
\begin{itemize} |
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\item \texttt{NUMCORES}: If defined it will override the detection of the number of cores. If not defined the number of cores is set through the \texttt{sysconf(\_SC\_NPROCESSORS\_ONLN)} system call. |
\item \texttt{NUMCORES}: If defined it will override the detection of the number of cores. If not defined the number of cores is set through the \texttt{sysconf(\_SC\_NPROCESSORS\_ONLN)} system call. |
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\item \texttt{ASYNC\_MEM\_TEST}: If defined asynchronous memory transfer tests will be built. Default is defined. |
\item \texttt{ASYNC\_MEM\_TEST}: If defined asynchronous memory transfer tests will be built. Default is defined. |
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\item \texttt{ASYNCI\_MEM\_TEST}: If defined asynchronous memory transfer with implicit handlers tests will be built. Default is defined. |
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\item \texttt{MINSIZE}: The minimum message size to be used in the benchmarking. Default is 4 bytes. |
\item \texttt{MINSIZE}: The minimum message size to be used in the benchmarking. Default is 4 bytes. |
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\item \texttt{MAXSIZE}: The maximum message size to be used in the benchmarking. Default is 16 megabytes. |
\item \texttt{MAXSIZE}: The maximum message size to be used in the benchmarking. Default is 16 megabytes. |
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\end{itemize} |
\end{itemize} |
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\begin{itemize} |
\begin{itemize} |
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\item \texttt{-help}: Print usage information and exits. |
\item \texttt{-help}: Print usage information and exits. |
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\item \texttt{-version}: Print UOMS version and exits. |
\item \texttt{-version}: Print UOMS version and exits. |
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\item \texttt{-off\_cache}: Enable cache invalidation. Be aware that the cache invalidation greatly increases the memory consumption. Also, note that for block sizes smaller than the cache line size it will not work. |
\item \texttt{-off\_cache}: Enable cache invalidation. Be aware that the cache invalidation greatly increases the memory consumption. Also, note that for block sizes smaller than the cache line size it will not have any effect. |
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\item \texttt{-warmup}: Enable a warmup iteration. |
\item \texttt{-warmup}: Enable a warmup iteration. |
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\item \texttt{-reduce\_op OP}: Choose the reduce operation to be performed by \texttt{upc\_all\_reduceD} and \texttt{upc\_all\_prefix\_reduceD}. Valid operations are: |
\item \texttt{-reduce\_op OP}: Choose the reduce operation to be performed by \texttt{upc\_all\_reduceD} and \texttt{upc\_all} \texttt{\_prefix\_reduceD}. Valid operations are: |
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\begin{itemize} |
\begin{itemize} |
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\item \texttt{UPC\_ADD (default)} |
\item \texttt{UPC\_ADD (default)} |
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\item \texttt{UPC\_MULT} |
\item \texttt{UPC\_MULT} |
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\item \texttt{upc\_all\_prefix\_reduceD} |
\item \texttt{upc\_all\_prefix\_reduceD} |
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\item \texttt{upc\_all\_reduceLD} |
\item \texttt{upc\_all\_reduceLD} |
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\item \texttt{upc\_all\_prefix\_reduceLD} |
\item \texttt{upc\_all\_prefix\_reduceLD} |
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\item \texttt{upc\_memget\_async} |
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\item \texttt{upc\_memput\_async} |
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\item \texttt{upc\_memcpy\_async} |
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\item \texttt{local\_upc\_memget\_async} |
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\item \texttt{local\_upc\_memput\_async} |
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\item \texttt{local\_upc\_memcpy\_async} |
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\item \texttt{upc\_memget\_asynci} |
\item \texttt{upc\_memget\_asynci} |
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\item \texttt{upc\_memput\_asynci} |
\item \texttt{upc\_memput\_asynci} |
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\item \texttt{upc\_memcpy\_asynci} |
\item \texttt{upc\_memcpy\_asynci} |
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